ADN4605_1111

Part No.:
ADN4605_1111
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Description:
4.25 Gbps 40 × 40 Digital
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1758 K
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AD [ ANALOG DEVICES ]
PCB Prototype

July 16, 2018:

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PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
Data Sheet
FEATURES
DC to 4.25 Gbps per port NRZ data rate
Adjustable receive equalization
3 dB, 6 dB, or 12 dB boost
Compensates over 40 inches of FR4 at 4.25 Gbps
Adjustable transmit preemphasis/deemphasis
Programmable boost and output level
Compensates over 40 inches of FR4 at 4.25 Gbps
Low power
105 mW per channel at 2.5 V (400 mV p-p differential
output level swing)
40 × 40, fully differential, nonblocking array
Double rank connection programming with dual maps
Low jitter, typically <25 ps
Flexible 2.5 V to 3.3 V supply range
DC- or ac-coupled differential PECL/CML inputs
Differential CML outputs
Per-lane polarity inversion for routing ease
50 Ω on-chip I/O termination with disable feature
Supports 8b10b, scrambled or uncoded NRZ data
Serial (IC slave or SPI) control interface
Parallel control interface
4.25 Gbps 40 × 40 Digital
Crosspoint Switch
ADN4605
FUNCTIONAL BLOCK DIAGRAM
DV
CC
V
CC
IP[39:0]
VTTIA,
VTTIB
IN[39:0]
Rx
40 × 40
SWITCH
MATRIX
Tx
PRE-
EMPHASIS
OP[39:0]
VTTOA,
VTTOB
ON[39:0]
EQ
EQUALIZATION
SETTINGS
CONNECTION
MAP 1
CONNECTION
MAP 0
OUTPUT
LEVEL
SETTINGS
PRE-
EMPHASIS
LEVEL
SETTINGS
V
EE
Figure 1.
APPLICATIONS
Digital video (HDMI, DVI, DisplayPort, 3G/HD/SD-SDI)
Fiber optic network switching
High speed serial backplane routing to OC-48 with FEC
XAUI, 4x Fibre Channel, Infiniband®, and GbE over backplane
Data storage networks
GENERAL DESCRIPTION
The
ADN4605
is a 40 × 40 asynchronous, protocol agnostic,
digital crosspoint switch, with 40 differential PECL/CML-
compatible inputs and 40 differential programmable CML
outputs.
The
ADN4605
is optimized for NRZ signaling with data rates of
up to 4.25 Gbps per port. Each port offers adjustable levels of
input equalization, programmable output swing, and output
preemphasis/deemphasis.
The
ADN4605
nonblocking switch core implements a 40 × 40
crossbar and supports independent channel switching through
serial and parallel control interfaces. The
ADN4605
has low
latency and very low channel-to-channel skew.
An I
2
C, SPI, or parallel interface is used to communicate with
the device for control of connectivity and other features.
The
ADN4605
is assembled in a 35 mm × 35 mm, 352 BGA
package and operates over a temperature range of −40°C
to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
09796-001
RESET
SER/PAR
I
2
C/SPI
(UPDATE)
CS
SCL/SCK/
WE
SDI/RE
DATA[0]/
SDA/SDO
PARALLEL/SERIA L CONTROL
LOGIC INTERFACE
DATA[1]
(UPDATE)
DATA[7:2]
ADDR[7:0]
ADN4605