CS51313,CS51313GD16,CS51313GDR16

Part No.:
CS51313,CS51313GD16,CS51313GDR16
Download:
Download
Description:
Synchronous CPU Buck Controller Capable of Implementing Multiple Linear Regulators
File Size:
249 K
Page:
20 Pages
Logo:
Maker:
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
PCB Prototype

July 16, 2018:

CSD16407Q5C_10

CTA11ACQ241.2D

CXD2304R

CY3950Z208-125MGC

CY8C28452

CY8C29X66

D5V0F1A2LP3-7B

D6C10HT

DBMB24W7PJ101

DCH37P001

DDZ17

DF15-40DP-0.65V

PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
CS51313
CS51313
Synchronous CPU Buck Controller
Capable of Implementing Multiple Linear Regulators
Description
The CS51313 is a synchronous dual
NFET Buck Regulator Controller. It is
designed to power the core logic of the
latest high performance CPUs. It uses the
V
2
TM
control method to achieve the
fastest possible transient response and
best overall regulation. It incorporates
many additional features required to
ensure the proper operation and protec-
tion of the CPU and Power system. The
CS51313 provides the industry’s most
highly integrated solution, minimizing
external component count, total solution
size, and cost.
The CS51313 is specifically designed to
power Intel’s Pentium
®
II processor and
includes the following features: 5-bit
DAC with 1.2% tolerance, Power-Good
output, overcurrent hiccup mode protec-
tion, over voltage protection, V
CC
moni-
tor, Soft Start, adaptive voltage position-
ing and adaptive FET non-overlap time.
A precision reference trimmed to 1% is
also externally available for use by other
regulators. The CS51313 will operate
over an 8.4V to 14V range and is avail-
able in 16 lead narrow body surface
mount package.
Features
s
Synchronous Switching
Regulator Controller for CPU
V
CORE
s
Dual N-Channel MOSFET
Synchronous Buck Design
s
V
2
TM
Control Topology
s
200ns Transient Loop Response
s
5-bit DAC with 1.2% Tolerance
s
Hiccup Mode Overcurrent
Protection
s
40ns Gate Rise and Fall Times
(3.3nF load)
s
65ns Adaptive FET Non-overlap
Time
s
Adaptive Voltage Positioning
s
Power-Good Output Monitors
Regulator Output
s
V
CC
Monitor Provides Under
Voltage Lockout
s
OVP Output Monitors Regulator
Output
s
Enable Through use of the
COMP pin
Application Diagram
+12V
+3.3V +3.3V
+5V
1200µF/10V
1200µF/10V
1µF
1200µF/10V
x3
FS70VSJ-03
VID0
VID1
VID2
VID3
VID4
OVP
V
REF
V
CC
GATEH
GATEL
V
FB
V
OUT
PWRGD
COMP
C
OFF
0.1
µF
FS70VSJ-03
1.2µH
3.3mΩ
V
CORE
2.0V@19A
1200µF/10V
x5
s
+1.23V Reference Voltage
Available Externally
510Ω
GND
0.1µF
10K
510Ω
Package Options
PWRGD
680pF
+12
18K
1%
3
2
51K
1%
100K
1%
LM358A
5
6
1µF
0.01
µF
IRL3103S
16 Lead SO Narrow
VID0
VID1
1
100Ω
+
-
COMP
C
OFF
PWRGD
OVP
GATE(L)
Gnd
GATE(H)
V
CC
1
LM358A
22.1K
1%
1200µF/ 10V
x2
VGTL+
1.5V@3A
VID2
VID3
V
REF
+
-
7
TIP 31
102K
VCLOCK
2.5V@1A
VID4
V
FB
V
OUT
100K
1%
1%
47µF
V
2
is a trademark of Switch Power, Inc.
Pentium is a registered trademark of Intel Corporation.
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 3/11/99
1
A
®
Company