ICS8535-21,ICS8535AG-21,ICS8535AG-21T

Part No.:
ICS8535-21,ICS8535AG-21,ICS8535AG-21T
Download:
Download
Description:
LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
File Size:
226 K
Page:
14 Pages
Logo:
Maker:
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
PCB Prototype

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PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
Integrated
Circuit
Systems, Inc.
ICS8535-21
L
OW
S
KEW
, 1-
TO
-2
LVCMOS/LVTTL-
TO
-3.3V LVPECL F
ANOUT
B
UFFER
F
EATURES
2 differential 3.3V LVPECL outputs
Selectable CLK0 or CLK1 inputs for redundant
and multiple frequency fanout applications
CLK0 or CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 266MHz
Translates LVCMOS and LVTTL levels to
3.3V LVPECL levels
Output skew: 20ps (maximum)
Part-to-part skew: 300ps (maximum)
Propagation delay: 1.6ns (maximum)
Additive phase jitter, RMS: 0.03ps (typical)
3.3V operating supply
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS8535-21 is a low skew, high performance
1-to-2 LVCMOS/LVTTL-to-3.3V LVPECL fanout
HiPerClockS™
buffer and a member of the HiPerClockS™ fam-
ily of High Performance Clock Solutions from
ICS. The ICS8535-21 has two single-ended clock
inputs. The single-ended clock input accepts LVCMOS or
LVTTL input levels and translate them to 3.3V LVPECL lev-
els. The clock enable is internally synchronized to eliminate
runt clock pulses on the output during asynchronous asser-
tion/deassertion of the clock enable pin.
ICS
Guaranteed output and part-to-part skew characteristics
make the ICS8535-21 ideal for those applications demand-
ing well defined performance and repeatability.
B
LOCK
D
IAGRAM
CLK_EN
D
Q
LE
CLK0
CLK1
0
1
Q0
nQ0
Q1
nQ1
CLK_SEL
P
IN
A
SSIGNMENT
V
EE
CLK_EN
CLK_SEL
CLK0
V
EE
CLK1
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
Q0
nQ0
nc
Q1
nQ1
V
CC
ICS8535-21
14-Lead TSSOP
4.4mm x 5.0mm x 0.92mm body package
G Package
Top View
8535AG-21
www.icst.com/products/hiperclocks.html
1
REV. A OCTOBER 20, 2004