LTC2208-14,LTC2208CUP-14,LTC2208IUP-14,LTC2208UP-14

Part No.:
LTC2208-14,LTC2208CUP-14,LTC2208IUP-14,LTC2208UP-14
Download:
Download
Description:
14-Bit, 130Msps ADC
File Size:
1062 K
Page:
28 Pages
Logo:
Maker:
LINER [ LINEAR TECHNOLOGY ]
PCB Prototype

July 16, 2018:

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PCB Datasheet:1PCB Datasheet:1
LTC2208-14
14-Bit, 130Msps ADC
FEATURES
DESCRIPTIO
Sample Rate: 130Msps
77.1dBFS Noise Floor
98dB SFDR
SFDR >81dB at 250MHz (1.5V
P-P
Input Range)
PGA Front End (2.25V
P-P
or 1.5V
P-P
Input Range)
700MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single 3.3V Supply
Power Dissipation: 1.32W
Clock Duty Cycle Stabilizer
Pin Compatible 16-Bit Version
130Msps: LTC2208 (16-Bit)
64-Pin (9mm
×
9mm) QFN Package
The LTC
®
2208-14 is a 130Msps, sampling 14-bit A/D
converter designed for digitizing high frequency, wide
dynamic range signals with input frequencies up to
700MHz. The input range of the ADC can be optimized
with the PGA front end.
The LTC2208-14 is perfect for demanding communications
applications, with AC performance that includes 77.1dBFS
Noise Floor and 98dB spurious free dynamic range (SFDR).
Ultralow jitter of 70fs
RMS
allows undersampling of high
input frequencies with excellent noise performance.
Maximum DC specs include ±1.5LSB INL, ±0.5LSB DNL
(no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to 3.6V.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
APPLICATIO S
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
3.3V
V
CM
2.2µF
1.25V
COMMON MODE
BIAS VOLTAGE
SENSE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
0.1µF
OF
CLKOUT
D13
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
ENC
+
ENC
PGA
SHDN
DITH
MODE
LVDS
RAND
0.1µF
0.1µF
220814 TA01
AIN
+
ANALOG
INPUT
AIN
S/H
AMP
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
CMOS
OR
LVDS
AMPLITUDE (dBFS)
+
14-BIT
PIPELINED
ADC CORE
0.1µF
ADC CONTROL INPUTS
220814f
U
32k Point FFT, f
IN
= 15.11MHz,
–1dB, PGA = 0, RAND “On”,
Dither “OFF”
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
3.3V
–100
–110
–120
0
10
40
30
20
50
FREQUENCY (MHz)
60
220814 G05
U
U
1