DS90LV018A,DS90LV018ATM,DS90LV018ATMX

Part No.:
DS90LV018A,DS90LV018ATM,DS90LV018ATMX
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Description:
DS90LV018A 3V LVDS Single CMOS Differential Line Receiver
File Size:
1018 K
Page:
17 Pages
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Maker:
TI [ TEXAS INSTRUMENTS ]
PCB Prototype

July 16, 2018:

DS90LV031AQML

E39-L70

EBE42FE8ACWR-6E-E

EL5111_07

EL7156_05

EN61000-3-2

EP2C20

EPF8074G

ERJ-3EKF2322V

ERJ-3EKF2371V

ERJ-8GEYJ100V

ESDALC6V1P

PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
DS90LV018A
www.ti.com
SNLS014D – JUNE 1998 – REVISED APRIL 2013
DS90LV018A 3V LVDS Single CMOS Differential Line Receiver
Check for Samples:
DS90LV018A
1
FEATURES
>400 Mbps (200 MHz) Switching Rates
50 ps Differential Skew (Typical)
2.5 ns Maximum Propagation Delay
3.3V Power Supply Design
Flow-Through Pinout
Power Down High Impedance on LVDS Inputs
Low Power Design (18mW @ 3.3V Static)
Interoperable with Existing 5V LVDS Networks
Accepts Small Swing (350 mV Typical)
Differential Signal Levels
Supports Open, Short and Terminated Input
Fail-Safe
Conforms to ANSI/TIA/EIA-644 Standard
Industrial Temperature Operating Range
– (−40°C to +85°C)
Available in SOIC Package
DESCRIPTION
The DS90LV018A is a single CMOS differential line
receiver designed for applications requiring ultra low
power dissipation, low noise and high data rates. The
device is designed to support data rates in excess of
400 Mbps (200 MHz) utilizing Low Voltage Differential
Signaling (LVDS) technology.
The DS90LV018A accepts low voltage (350 mV
typical) differential input signals and translates them
to 3V CMOS output levels. The receiver also
supports open, shorted and terminated (100Ω) input
fail-safe. The receiver output will be HIGH for all fail-
safe conditions. The DS90LV018A has a flow-through
design for easy PCB Manufacturing layout.
The DS90LV018A and companion LVDS line driver
provide a new alternative to high power PECL/ECL
devices for high speed point-to-point interface
applications.
2
Connection Diagram
Figure 1. SOIC
See Package Number D (R-PDSO-G8)
Functional Diagram
Truth Table
INPUTS
[R
IN
+]
[R
IN
−]
V
ID
0.1V
V
ID
≤ −0.1V
Full Fail-safe OPEN/SHORT or Terminated
OUTPUT
R
OUT
H
L
H
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 1998–2013, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.