GX434,GX434,GX434CDB,GX434CDB,GX434CKC,GX434CKC,GX434CTC,GX434CTC

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GX434,GX434,GX434CDB,GX434CDB,GX434CKC,GX434CKC,GX434CTC,GX434CTC
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Description:
GX434 Monolithic 4x1 Video Multiplexer
File Size:
203 K
Page:
9 Pages
Logo:
Maker:
ETC [ ETC ]
PCB Prototype

July 16, 2018:

HDSP-F508-00016

HF323

HF373

HFCT-5952NL

HLMP-1301

HMC241QS16_06

HMC314

HMC316MS8_08

HMC529LP5E

HMC536MS8G_08

HMC721LP3E

HMC767LP6CE

PCB Datasheet:1PCB Datasheet:1
GX434 Monolithic 4x1
Video Multiplexer
DATA SHEET
FEATURES
low differential gain: 0.03% typ. at 4.43 MHz
low differential phase: 0.012 deg. typ. at 4.43 MHz
low insertion loss: 0.05 dB max at 100 kHz
low disabled power consumption: 5.2 mW typ.
high off isolation: 110 dB at 10 MHz
all hostile crosstalk @ 5 MHz, 97 dB typ.
bandwidth (-3dB) with 30 pF load, 100 MHz typ.
fast make-before-break switching: 200 ns typ.
TTL and 5 volt CMOS compatible logic inputs
low cost 14 pin DIP and16 pin SOIC packages
optimised performance for NTSC, PAL and SECAM
applications
APPLICATIONS
Glitch free analog switching for...
• High quality video routing
• A/D input multiplexing
• Sample and hold circuits
• TV/ CATV/ monitor switching
IN 0
GND
IN 1
GND
IN 2
CIRCUIT DESCRIPTION
The GX434 is a high performance low cost monolithic 4x1
video multiplexer incorporating four bipolar switches with a
common output, a 2 to 4 address decoder and fast chip select
circuitry. The chip select input allows for multi-chip paralleled
operation in routing matrix applications. The chip is selected
by applying a logic 0 on the chip select input.
Unlike devices using MOS bilateral switching elements, these
bipolar circuits represent fully buffered, unilateral transmission
paths when selected. This results in extremely high output to
input isolation. They also feature fast make-before-break
switching action. These features eliminate such problems as
switching 'glitches' and output-to-input signal feedthrough.
The GX434 operates from
±
7 to
±
13.2 volt DC supplies. They
are specifically designed for video signal switching which
requires extremely low differential phase and gain. Logic
inputs are TTL and 5 volt CMOS compatible providing address
and chip select functions. When the chip is not selected, the
output goes to a high impedance state.
PIN CONNECTIONS
TOP VIEW
PIN 1
14
+8V
TOP VIEW
AO
A1
CS
O/P
NC
R
EXT
7
8
-8V
IN 0
GND
IN 1
GND
IN 2
PIN 1
16
+8V
NC
AO
A1
CS
O/P
NC
R
8
9
-8V
EXT
AVAILABLE PACKAGING
14 pin DIP and 16 pin SOIC (wide)
GND
IN 3
GND
IN 3
NC
FUNCTIONAL BLOCK DIAGRAM
PIN CONNECTION
14 PIN DIP
PIN CONNECTION
16 PIN SOIC
GX434
IN 0
IN 1
IN 2
IN 3
(wide)
X
TRUTH TABLE
X
X
X
OUTPUT
CS
0
0
0
A1
0
0
1
1
X
A0
0
1
0
1
X
OUTPUT
IN 0
IN 1
IN 2
IN 3
HI - Z
A0
A1
2 TO 4 DECODER
LOGIC
CHIP
SELECT
CS
0
1
X = DON'T CARE
Document No. 510 - 34 - 2
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3
Japan Branch: A-302 M i yamae Vi l l age, 2–10–42 M i yamae, Suginami–ku, Tokyo 168, Japan
tel. (905) 632-2996 fax: (905) 632-5946
tel. (03) 3334-7700
fax (03) 3247-8839