HYM72V64C736AT4-H

Part No.:
HYM72V64C736AT4-H
Download:
Download
Description:
x72 SDRAM Module
File Size:
237 K
Page:
13 Pages
Logo:
Maker:
ETC [ ETC ]
PCB Prototype

July 16, 2018:

HYS64D64320GU-6-C

ICE2A0565Z

ICS83905_07

ICS8535AG-21T

IM03JR

IP5954AL-TF

IPB039N04LG

IPB80N06S4L-07

IPS110N12N3G

IR3502AMTRPBF

IRFB3306PBF

IRFR18N15D

PCB Datasheet:1
64Mx72 bits
PC133 SDRAM Registered DIMM
with PLL, based on 64Mx4 SDRAM with LVTTL, 4 banks & 8K Refresh
HYM72V64C736AT4 Series
DESCRIPTION
The Hyundai HYM72V64C736AT4 Series are 64Mx72bits ECC Synchronous DRAM Modules. The modules are composed of eigh-
teen 64Mx4bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a
168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on
512Mbytes memory. The Hyundai HYM72V64C736AT4 Series are fully synchronous operation referenced to the positive edge of the
clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve
very high bandwidth.
FEATURES
PC133/PC100MHz support
168pin SDRAM Unbuffered DIMM
Serial Presence Detect with EEPROM
1.70” (43.18mm) Height PCB Manufacturer with double sided
components
Single 3.3±0.3V power supply
SDRAM internal banks : four banks
Module bank : one physical bank
Auto refresh and self refresh
8192 refresh cycles / 64ms
Programmable Burst Length and Burst Type
- 1, 2, 4 or 8 or Full page for Sequential Burst
All device pins are compatible with LVTTL interface
- 1, 2, 4 or 8 for Interleave Burst
Data mask function by DQM
Programmable CAS Latency ; 2, 3 Clocks
ORDERING INFORMATION
Part No.
HYM72V64C736AT4-H
Clock
Frequency
133MHz
Internal
Bank
4 Banks
Ref.
8K
Power
Normal
SDRAM
Package
TSOP-II
Plating
Gold
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of
circuits described. No patent licenses are implied.
Rev. 1.2/Feb.01