CY7C68001,CY7C68001-56LFC,CY7C68001-56LFXC,CY7C68001-56PVC,CY7C68001-56PVXC

Part No.:
CY7C68001,CY7C68001-56LFC,CY7C68001-56LFXC,CY7C68001-56PVC,CY7C68001-56PVXC
Download:
Download
Description:
EZ-USB SX2? High-Speed USB Interface Device
File Size:
980 K
Page:
42 Pages
Logo:
Maker:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype

July 19, 2018:

CY8C20534-PVXIT

CY8C20X96

CYW137OXCT

DAJT3WK3P1-1A0N

DAM-7W2P-NMB-K52

DAMAY26PNM

DBMC37PJ101

DBMMP21H1P-J

DCMA-62P-NMB-K47FO

DCMB-37S-NMC-77

DDMMD43C2PJ

DDZ21

PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
CY7C68001
EZ-USB
SX2™
High-Speed USB Interface Device
1.0
EZ-USB
SX2™
Features
2.0
Applications
• USB 2.0-certified compliant
— On the USB-IF Integrators List: Test ID Number
40000713
• Operates at high (480 Mbps) or full (12 Mbps) speed
• Supports Control Endpoint 0:
— Used for handling USB device requests
• Supports four configurable endpoints that share a 4-
KB FIFO space
— Endpoints 2, 4, 6, 8 for application-specific control
and data
• Standard 8- or 16-bit external master interface
— Glueless interface to most standard microproces-
sors DSPs, ASICs, and FPGAs
— Synchronous or Asynchronous interface
• Integrated phase-locked loop (PLL)
• 3.3V operation, 5V tolerant I/Os
• 56-pin SSOP and QFN package
• Complies with most device class specifications
• DSL modems
• ATA interface
• Memory card readers
• Legacy conversion devices
• Cameras
• Scanners
• Home PNA
• Wireless LAN
• MP3 players
• Networking
• Printers
The “Reference Designs” section of the Cypress web site
provides additional tools for typical USB applications. Each
reference design comes complete with firmware source code
and object code, schematics, and documentation. Please see
the Cypress web site at www.cypress.com.
2.1
Block Diagram
SCL
I2C Bus
Controller
(Master Only)
SDA
WAKEUP*
RESET#
IFCLK*
24 MHz
XTAL
PLL
Read*, Write*, OE*, PKTEND*, CS#
Interrupt#, Ready
SX2 Internal Logic
Flags (3/4)
Address (3)
Control
VCC
1.5K
FIFO
Data
Bus
USB 2.0 XCVR
CY Smart USB
FS/HS Engine
4 KB
FIFO
Data
8/16-Bit Data
DPLUS
DMINUS
Figure 2-1. Block Diagram
Cypress Semiconductor Corporation
Document #: 38-08013 Rev. *E
3901 North First Street
San Jose
CA 95134 •
408-943-2600
Revised July 13, 2004