56F8346,56F8346

Part No.:
56F8346,56F8346
Download:
Download
Description:
56F8346 16-bit Hybrid Controller
File Size:
1398 K
Page:
160 Pages
Logo:
Maker:
MOTOROLA [ MOTOROLA, INC ]
PCB Prototype

July 19, 2018:

5962-0622901VXC

5962R9583401VXXC

632LP5E

6402

67351-5006

72510

74712-5007

74AC11253

74ACT16863DL

74LVC1G240DCKTG4

75117-1118

760930001

PCB Datasheet:1PCB Datasheet:1PCB Datasheet:1
Freescale Semiconductor, Inc.
MC56F8346/D
Rev. 8.0, 6/2004
56F8346
Preliminary Technical Data
56F8346 16-bit Hybrid Controller
• Up to 60 MIPS at 60MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• Access up to 1MB of off-chip program and data
memory
• Chip Select Logic for glueless interface to ROM
and SRAM
• 128KB of Program Flash
• 4KB of Program RAM
• 8KB of Data Flash
• 8KB of Data RAM
• 8KB of Boot Flash
• Two 6-channel PWM Modules
• Four 4-channel, 12-bit ADCs
RSTO
EMI_MODE
EXTBOOT
5
V
PP
2
Freescale Semiconductor, Inc...
Temperature Sensor
Two Quadrature Decoders
Optional On-Chip Regulator
FlexCAN module
Two Serial Communication Interfaces (SCIs)
Up to two Serial Peripheral Interfaces (SPIs)
Up to four general-purpose Quad Timers
Computer Operating Properly (COP) / Watchdog
JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• Up to 62 GPIO lines
• 144-pin LQFP Package
V
CAP
4
OCR_DIS
V
DD
V
SS
7
5
Digital Reg
V
DDA
2
V
SSA
RESET
6
3
3
6
3
4
4
4
5
4
4
PWM Outputs
Current Sense Inputs
or GPIOC
Fault Inputs
PWM Outputs
Current Sense Inputs
or GPIOD
Fault Inputs
AD0
AD1
VREF
AD0
AD1
Temp_Sense
PWMA
JTAG/
EOnCE
Port
Analog Reg
16-Bit
56800E Core
Low Voltage
Supervisor
Bit
Manipulation
Unit
PWMB
Program Controller
and
Hardware Looping Unit
Address
Generation Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
ADCA
PAB
PDB
CDBR
CDBW
Memory
ADCB
Program Memory
64K x 16 Flash
2K x 16 RAM
4K x 16 Boot
Flash
Data Memory
4K x 16 Flash
4K x 16 RAM
XDB2
XAB1
XAB2
PAB
R/W Control
6
External
Address Bus
Switch
2
8
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
A8-15 or GPIOA0-7
GPIOB0 or A16
4
4
2
2
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or
GPIOC
Quad
Timer C or
GPIOE
Quad
Timer D or
GPIOE
FlexCAN
External Bus
Interface Unit
PDB
CDBR
CDBW
System Bus
Control
External Data
Bus Switch
7
9
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
RD
IPBus Bridge (IPBB)
Decoding
Peripherals
Clock
resets
Bus Control
2
GPIOD0-1 or CS2-3
PS (CS0) or GPIOD8
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
DS (CS1) or GPIOD9
PLL
SPI0 or
GPIOE
4
SCI1 or
GPIOD
2
SCI0 or
GPIOE
2
COP/
Watchdog
Interrupt
Controller
System
O
Integration
R
Module
CLKO
P
O
Clock
Generator
S
C
XTAL
EXTAL
IRQA IRQB
CLKMODE
56F8346 Block Diagram - 144 LQFP
© Motorola, Inc., 2004. All rights reserved.
For More Information On This Product,
Go to: www.freescale.com