TAA2009

Part No.:
TAA2009
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Download
Description:
STEREO 9W (8з) CLASS-T⑩ DIGITAL AUDIO AMPLIFIER USING DIGITAL POWER PROCESSING⑩ TECHNOLOGY
File Size:
313 K
Page:
19 Pages
Logo:
Maker:
TRIPATH [ TRIPATH TECHNOLOGY INC. ]
PCB Prototype

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PCB Datasheet:1PCB Datasheet:1
Tripath Technology, Inc. - Technical Information
TAA2009
STEREO 9W (8Ω) CLASS-T™ DIGITAL AUDIO AMPLIFIER USING
DIGITAL POWER PROCESSING™ TECHNOLOGY
TECHNICAL INFORMATION
Revision 1.02 – May 2006
GENERAL DESCRIPTION
The TAA2009 is a 9W/ch continuous average two-channel Class-T Digital Audio Power Amplifier IC
using Tripath’s proprietary Digital Power Processing™ technology. The TAA2009, in a QFN package,
along with extremely high efficiency, allows for a very compact amplifier design. Class-T amplifiers
offer both the audio fidelity of Class-AB and the power efficiency of Class-D amplifiers.
APPLICATIONS
FEATURES
LCD TV’s
LCD Monitors
Plasma TV’s
Computer/PC Multimedia
Battery Powered Systems
BENEFITS
Fully integrated solution with FETs
Compact packaging and board design
Reduced system cost with no heat sink
Differential inputs minimize common-mode
noise
Dramatically improves efficiency versus Class-
AB
Signal fidelity equal to high quality linear
amplifiers
High dynamic range compatible with digital
media such as CD, DVD, and Internet audio
Capable of driving a wide range of load
impedances
Sophisticated pop reduction circuit
TYPICAL PERFORMANCE
THD+N versus Output Power
10
VDD = 12V
5
2
f = 1kHz
Gain1=0, Gain0=1
BW = 22Hz - 20kHz(AES17)
Class-T architecture
Single Supply Operation
“Audiophile” Quality Sound
0.05% THD+N @ 5W, 8Ω
0.16% IHF-IM @ 1W, 8Ω
6.4W @ 8Ω, 0.1% THD+N
3.5W @ 16Ω, 0.1% THD+N
High Power
10.6W @ 6Ω, 10% THD+N
9W @ 8Ω, 10% THD+N
5W @ 16Ω, 10% THD+N
Extremely High Efficiency
90% @ 5W, 16Ω
86% @ 9W, 8Ω
Dynamic Range = 96 dB
Mute and Sleep modes
Improved turn-on & turn-off pop
suppression
Over-current protection with automatic
restart circuit
Over-temperature protection
Space saving 32-pin 8mm x 8mm x 1mm
QFN package with exposed pad
Filterless Operation Option
32-pin QFN
(Top View)
IN2M
C2
INL
V5A
BIASCAP
AGND
C1
IN1M
THD+N (%)
1
0.5
0.2
0.1
0.05
R
L
= 16Ω
R
L
= 8Ω
R
L
= 4Ω
R
L
= 6Ω
IN1P
V5D
GAIN0
DGND
REF
SLEEP
MUTE
FAULT
1
2
3
4
5
6
7
8
26
27
28
29
30
31
32
11
10
9
VDD2
PGND2
OUTM2
OUTM1
PGND1
VDD1
OUTP1
25
OUTP2
24
23
22
21
20
19
18
17
IN2P
AGND
GAIN1
5VGEN
VDDA
DCAP
CPUMP
SUB
16
15
14
13
12
0.02
0.01
1
2
3
4
5
6
7
8 9 10
20
Output Power (W)
1
TAA2009 –KLi/1.02/ 05.06